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T[B*SAcC{ͨ_:@ 5FB9J@?kaT@9@9?kTk :@ q@T9yAbx.@zb6w.@97kDR@ @3Assqa|_!a|5@!@(6;4@ 5@R!kD7*SAcC{ͨ_k`@xq Ts@*yH7 R:@P7:@A*R@Ro@ ARo@c9#Hc`Ck)C9 @@ C@b  !a`9?*7sEYW6:@A4!Q?qITkDsEkRrA`R Co`R:o[B7Yw    {"RS4Rc@wyn9 5#R"RSA{Ũ_`@*!SA{Ũ_     {S* RaFB9 k- T[k`BB9z@4c~ S+7|x*@kwUcC&z+@5 V!! @`T`6@y init_mutexfailed to clear cr0 Unknownunexpected global error reported (0x%08x), this could be serious device has entered Service Failure Mode! GERROR MSI write aborted PRIQ MSI write aborted EVTQ MSI write aborted CMDQ MSI write aborted PRIQ write aborted -- events may have been lost EVTQ write aborted -- events may have been lost CMDQ error (cons 0x%08x): %s retrying command fetch skipping command in error state: 0x%016llx GBPA not responding to update CMDQ timeout CMD_SYNC timeout at 0x%08x [hwprod 0x%08x, hwcons 0x%08x] ignoring unknown CMDQ opcode 0x%x event 0x%02x received: EVTQ overflow detected -- events lost LunRWXunexpected PRI request received: sid 0x%08x.0x%05x: [%u%s] %sprivileged %s%s%s access at iova 0x%016llx PRIQ overflow detected -- requests lost truefalse#iommu-cellsmissing #iommu-cells property invalid #iommu-cells value (%d) option %s MMIO region too small (%pr) combinedeventqpriqgerrorunknown/unsupported TT endianness! IDR0.COHACC overridden by FW configuration (%s) no translation support! AArch64 table format not supported! embedded implementation not supported command queue size <= %d entries not supported unknown output address size. Truncating to 48-bit failed to set DMA mask for table walker ias %lu-bit, oas %lu-bit (features 0x%08x) &smmu->streams_mutexcmdqevtq2-level strtab only covers %u/%u bits of SID failed to allocate l1 stream table (%u bytes) failed to allocate linear stream table (%u bytes) RMR SID(0x%x) bypass failed SMMU currently enabled! Resetting... failed to enable command queue failed to enable event queue failed to enable PRI queue failed to enable ATS check failed to disable irqs failed to setup irqs arm-smmu-v3-combined-irqfailed to enable combined irq msi_domain absent - falling back to wired irqs failed to allocate MSIs - falling back to wired irqs arm_smmu_free_msisarm-smmu-v3-evtqfailed to enable evtq irq no evtq irq - events will not be reported! arm-smmu-v3-gerrorfailed to enable gerror irq no gerr irq - errors will not be reported! arm-smmu-v3-priqfailed to enable priq irq no priq irq - PRI will be broken failed to enable irqs failed to enable SMMU interface smmu3.%paFailed to register iommu Failed to enable ATS (STU %zu) failed to allocate context descriptor table failed to allocate context descriptor No errorIllegal commandAbort on command fetchATC invalidate timeoutarm-smmu-v3hisilicon,broken-prefetch-cmdcavium,cn9900-broken-page1-regspaced  (  h   ZG%(2 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.cdrivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c{ {_\\\\\\\\\\\\\\\\\\\\\arm_smmu_v3.license=GPL v2arm_smmu_v3.file=drivers/iommu/arm/arm-smmu-v3/arm_smmu_v3arm_smmu_v3.alias=platform:arm-smmu-v3arm_smmu_v3.author=Will Deacon arm_smmu_v3.description=IOMMU API for ARM architected SMMUv3 implementationsarm_smmu_v3.parm=disable_msipolling:Disable MSI-based polling for CMD_SYNC completion.arm_smmu_v3.parmtype=disable_msipolling:boolarm_smmu_v3.parm=disable_bypass:Disable bypass streams such that incoming transactions from devices that are not attached to an iommu domain will report an abort back to the device and will not be allowed to pass through the SMMU.arm_smmu_v3.parmtype=disable_bypass:bool$$GCC: (GNU) 13.2.1 20231205 (Red Hat 13.2.1-6)M ,behe He 00eh0e0e0eTe pe&ee>PeId b e"e$`Pde&xe(e*($e,X.e.e/e1 43e35e6 8b88 e: 4e<18 de>Ge@aPeBreD|eF@eHeJ<eLNePXeR'(|eT>eVV eXteZe\e^ e`"eb"`ed($ef(%eh>%ejO&elf'enz)pep+er -Tet-ev.,ex.ez Ae|&HFe~:(GeRGfMeeeeeeeHH@ p((8(e &07(J@i`ee;V'}11MMWoR-f)e(((55,5X%5/595C5M54W5`  "$&(*,/16:<>@BDFHJLPRTVXZ\^`bdfhjlnprtvxz|~akt  # A \ {           . 7 N [ s         $ ; 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