// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2015 Armadeus Systems <support@armadeus.com>

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		vin-supply = <&reg_3p3v>;
	};

	usdhc1_pwrseq: usdhc1-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
		post-power-on-delay-ms = <15>;
		power-off-delay-us = <70>;
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-reset-duration = <10>;
	phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
	phy-handle = <&ethphy1>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			interrupt-parent = <&gpio1>;
			interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
			status = "okay";
		};
	};
};

/* Bluetooth */
&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
	status = "okay";
};

/* Wi-Fi */
&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <4>;
	mmc-pwrseq = <&usdhc1_pwrseq>;
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	cap-power-off-card;
	keep-power-in-suspend;
	non-removable;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio2>;
		interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
		tcxo-clock-frequency = <38400000>;
	};
};

/* eMMC */
&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <8>;
	no-1-8-v;
	non-removable;
	status = "okay";
};

&iomuxc {
	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x130b0
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x130b0
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x13030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1f030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1f030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b0
			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b0
			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b0
			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b0
			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x130b0 /* BT_EN */
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17059
			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10059
			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17059
			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17059
			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17059
			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17059
			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08	0x130b0 /* WL_EN */
			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x130b0 /* WL_IRQ */
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
		>;
	};
};
